SX-430 EW SDR Transceiver Card

Description

The SX-430 EW SDR Transceiver is a 3U OpenVPX CMOSS/SOSA compliant high performance, dual-channel RX, dual-channel TX, software defined transceiver that operates over the 1-18000 MHz frequency range. Selectable instantaneous bandwidths from 40-160 MHz, industry leading tuning speeds, and Red/Black separation make this SDR an ideal fit for most EW/SIGINT/COMMS applications. The EW Card is a full subsystem in itself in that it has significant onboard FPGA resources for hosting 3rd party algorithms, such as up to 128 Inbuilt programmable DDC’s and an FFT core with 6.25 KHz resolution on each channel. The EW Card also has up to 12 GB of total onboard DDR4 memory.

Details

  • Dual Independent TX and RX Channels
  • Up to 128 Inbuilt programable DDC’s.
  • VICTORY and MORA compliant with built-in Red / Black CDS
  • ADC and DAC resolution = 16 bits I and Q
  • 40 GbE ML2B real-time bus supported
  • Supports multi-card, phase coherent operation for geolocation and beamforming.
  • FPGAs: Red: Zynq UltraScale+ ZU04EG, Black: Zynq UltraScale+ ZU19EG
  • Up to 12 GB of total onboard DDR4 memory

Specifications

Receiver

  • Frequency Range: 1-18000 MHz
  • IBW: 160MHz (selectable 160, 80, 40 MHz)
  • Scan Rate: 1,000 GHz/sec per/Ch @ 6.25 kHz FFT bin resolution
  • Tuning Speed: Contact factory
  • DDC Tuning Resolution: 1 Hz
  • Synthersiser Phase Noise: < 100 fs jitter
  • SFDR: >85dB
  • Noise Figure: 12dB across all freqs.
  • Input Power: +30 dBm max without damage

Exciter

  • Frequency Range: 1-18000 MHz
  • Tuning Resolution: 1 Hz
  • Output Power: 10 dBm nominal
  • Power Adjustment Range: 52 dB in 1 dB steps
  • Tuning Speed: Contact factory

SWAP

  • Size: 100 x 160 x 25 mm (3U OpenVPX)
  • Weigth: approx 500 grams
  • Power: 40 W Typical

Bundled Software & SDK-2010 Software Development Kit (SDK)

Bundled Software (CPU and ARM Processors)

  • Delivered with Card is all the necessary CMOSS-compliant software (VICTORY/MORA) for use in any CMOSS or SOSA chassis to verify operations
  • MORA Software Library for building CMOSS/SOSA MORA messages
  • VICTORY Server and Client example implementations (uses the VICTORY core library provided by the U.S. Government)
  • Red Hat Linux Operating Systems pre-installed on x86 CPU mezzanine XMC
  • Petalinux Operating System on the Xilinx Zynq FPGA
  • API Functions to command and control EW Card transceiver hardware

SDK-2010 Software Development Kit

  • Development kit for MORA software for both Red and Black side
  • High level functions for rapid application development.
  • Spectranetix high level API for MORA device acquisition, control, context, and data
  • Project files and development environment
  • Example applications with source code

Bundled Firmware & EDK-2030 Embedded Development Kit (EDK)

Bundled Firmware (FPGA Image)

  • Base Zynq FPGA infrastructure Image that provides access to all I/O, contains example FFT and DDC channel cores
  • FFT Channel
    • Programmable 2K-32K point FFT core
    • Includes Windowing, Averaging, FFT, Linear-to-Log Conversion
  • DDC Channel (single)
    • 2x-1024x Decimation
    • 16-bit DDS for fine tuning
  • All cores are AXI-4 compliant
  • Small footprint image, 90% resources still available on FPGA
  • Complete EW Card Transceiver Control

EDK-2020 Embedded Development Kit

  • Provides the ability to modify the base FPGA source code
  • Vivado project and build scripts included
  • Includes Xilinx licensing for cores (40 GbE)


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