SX-310 DSP Card (x86)


The SX-310 is a ruggedized 3U OpenVPX CMOSS/SOSA computing card that is powerful enough to run many varieties of SIGINT / EW / COMMS applications, and host Government or 3rd party algorithms and cyber payloads. Can simultaneously serve as the system controller SBC and a DSP engine. Inbuilt Red-Black separation for Unencrypted / Encrypted applications and interfaces. Can operate in any CMOSS or SOSA standard Payload Slot, which removes the need for dedicated CPU slots in the chassis. This creates more room in the CMOSS/SOSA system for additional payload cards. By supporting both Red and Black side algorithm processing, the DSP Card, with a mezzanine XMC CPU module, replaces two cards in a CMOSS or SOSA chassis.


  • Xilinx UltraScale+ Zynq XCZU19EG FPGA supporting the Black MORA processing side
  • Quad Core ARM Cortex-A53 combined with dual core Cortex-R5 real time processors and a Mali-400 MP2 GPU
  • XMC slot contains a Concurrent XP B52/521-22RC mezzanine with a 6th generation X64 i3-6102E CPU for Red side VICTORY processing
  • 8 lanes of PCIe RED Expansion Plane connection supported
  • Inbuilt Red/Black separation and a FPGA-based Cross Domain Switch (CDS)
  • 40 Gigabit speed data transfers on the MORA Low Latency Bus (ML2B) supported
  • 10 or 20 GBytes of onboard DDR4 FPGA memory (-10 or -20 order options)
  • 8 Gbytes of flash memory
  • 3 Ethernet Interfaces (1 GbE Red, 1 GbE Black, 40 GbE Black)

Bundled Software and Software Development Kit (SDK)

Bundled Software (CPU and ARM Processors)

  • Delivered with Card is all the necessary CMOSS software (VICTORY/MORA) for use in any CMOSS or SOSA chassis to verify operations
  • MORA Software Library for building CMOSS/SOSA MORA messages
  • VICTORY Server and Client example implementations (uses the VICTORY core library provided by the U.S. Government)
  • Red Hat Linux Operating Systems pre-installed on x86 CPU mezzanine XMC
  • Petalinux Operating System on the Xilinx Zynq FPGA

SDK-2010 Software Development Kit

  • Development kit for MORA software for both Red and Black side
  • High level functions for rapid application development.
  • Spectranetix high level API for MORA device acquisition, control, context, and data
  • Project files and development environment
  • Example applications with source code

Bundled Firmware and Embedded Development Kit (EDK)

Bundled Firmware (FPGA Image)

  • Base Zynq FPGA infrastructure Image that provides access to all I/O, contains example FFT and DDC channel cores
  • FFT Channel
    • Programmable 2K-32K point FFT core
    • Includes Windowing, Averaging, FFT, Linear-to-Log Conversion
  • DDC Channel (single)
    • 2x-1024x Decimation
    • 16-bit DDS for fine tuning
  • All cores are AXI-4 compliant
  • Small footprint image, 90% resources still available on FPGA

EDK-2020 Embedded Development Kit

  • Provides the ability to modify the base FPGA source code
  • Vivado project and build scripts included
  • Includes Xilinx licensing for cores (40 GbE)

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